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 74ABT241 Octal Buffer/Line Driver with 3-STATE Outputs
January 1995 Revised March 2005
74ABT241 Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The ABT241 is an octal buffer and line driver with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ receiver.
Features
s Non-inverting buffers s Output sink capability of 64 mA, source capability of 32 mA s Guaranteed latchup protection s High impedance glitch free bus loading during entire power up and power down cycle s Nondestructive hot insertion capability
Ordering Code:
Order Number 74ABT241CSC 74ABT241CSJ 74ABT241CMSA 74ABT241CMTC Package Number M20B M20D MSA20 MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Descriptions
Pin Names OE1 OE2 I0-I7 O0-O7 Description Output Enable Input (Active LOW) Output Enable Input (Active HIGH) Inputs Outputs
Truth Table
OE1 H L L I0-3 X H L O0-3 Z H L OE2 L H H I4-7 X H L O4-7 Z H L
H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance
(c) 2005 Fairchild Semiconductor Corporation
DS011691
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74ABT241
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-Off State in the HIGH State Current Applied to Output in LOW State (Max) DC Latchup Source Current (Over Comm Operating Range) Over Voltage Latchup (I/O) twice the rated IOL (mA)
65qC to 150qC 55qC to 125qC 55qC to 150qC 0.5V to 7.0V 0.5V to 7.0V 30 mA to 5.0 mA
Recommended Operating Conditions
Free Air Ambient Temperature Supply Voltage Minimum Input Edge Rate ('V/'t) Data Input Enable Input 50 mV/ns 20 mV/ns
40qC to 85qC 4.5V to 5.5V
0.5V to 5.5V 0.5V to VCC
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
500 mA
10V
DC Electrical Characteristics
Symbol VIH VIL VCD VOH VOL IIH IBVI IIL VID Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input LOW Current Input Leakage Test 4.75 2.5 2.0 0.55 1 1 7 Min 2.0 0.8 Typ Max Units V V V V V V Min Min Min Min Max Max Max 0.0 0 5.5V 0 5.5V Max Max 0.0 Max Max Max VCC Conditions Recognized HIGH Signal Recognized LOW Signal IIN IOH IOH IOL VIN VIN VIN VIN VIN IID
1.2
18 mA 3 mA 32 mA
64 mA 2.7V (Note 4) VCC 7.0V 0.5V (Note 4) 0.0V 1.9 PA
PA PA PA
V
1 1
All Other Pins Grounded IOZH IOZL IOS ICEX IZZ ICCH ICCL ICCZ ICCT Output Leakage Current Output Leakage Current Output Short-Circuit Current Output High Leakage Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current Additional ICC/Input Outputs Enabled Outputs 3-STATE Outputs 3-STATE ICCD Dynamic ICC (Note 4) No Load 0.1 10
PA PA
mA
VOUT VOUT VOUT VOUT VOUT
2.7V; OEn 0.5V; OEn 0.0V VCC
2.0V 2.0V
10 100 275
50 100 50 30 50 2.5 2.5 50
PA PA PA
mA
5.5V; All Others GND
All Outputs HIGH All Outputs LOW OEn VI VCC; VCC 2.1V VCC 2.1V V CC 2.1V
PA
mA mA
All Others at VCC or Ground Max Enable Input VI Data Input VI Outputs Open OEn GND, (Note 3) One Bit Toggling, 50% Duty Cycle
Note 3: For 8 bits toggling, ICCD 0.8 mA/MHz. Note 4: Guaranteed, but not tested.
PA
mA/ MHz
All Others at VCC or Ground Max
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2
74ABT241
DC Electrical Characteristics
(SOIC package) Conditions Symbol Parameter Min Typ Max Units VCC CL RL VOLP VOLV VOHV VIHD VILD Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Output Voltage Minimum HIGH Level Dynamic Input Voltage Maximum LOW Level Dynamic Input Voltage 0.5 0.8 V V V V 0.8 V 5.0 5.0 5.0 5.0 5.0 TA TA TA TA TA 50 pF, 500:
25qC (Note 5) 25qC (Note 5) 25qC (Note 7) 25qC (Note 6) 25qC (Note 6)
1.3
2.7 2.0
0.8
3.1 1.5 1.1
Note 5: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested. Note 6: Max number of data inputs (n) switching. n 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD). Guaranteed, but not tested. Note 7: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
AC Electrical Characteristics
(SOIC and SSOP package) TA VCC Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ Parameter Min Propagation Delay Data to Outputs Output Enable Time Output Disable Time 1.0 1.0 1.1 1.3 1.6 1.0 CL
25qC 5V
50 pF Typ Max 4.6 4.6 6.8 6.8 6.8 5.9
TA
40qC to 85qC
4.5V-5.5V 50 pF Max 4.6 4.6 6.8 6.8 6.8 5.9 ns ns ns Units CL
VCC
Min 1.0 1.0 1.1 1.3 1.6 1.0
Capacitance
Conditions Symbol CIN COUT (Note 8) Parameter Input Capacitance Output Capacitance Typ 5.0 9.0
1 MHz, per MIL-STD-883, Method 3012.
Units pF pF VCC VCC 0V 5.0V
TA
25qC
Note 8: COUT is measured at frequency f
3
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74ABT241
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B
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4
74ABT241
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D
5
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74ABT241
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package Number MSA20
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6
74ABT241 Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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